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Makefile-tutorial/Makefile
2024-11-08 00:27:08 +05:30

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5.9 KiB
Makefile

#############GUIDE LIST##########################################
# G1. CC: #
# Flag to mention the C compiler to used. #
# #
# G2. CFLAGS: #
# Flag to specify the option for C compiler. #
# #
# G3. OUTPUT_OPTION: #
# Tells compiler(mainly gcc or clang) to find #
# the dependencies(include header file) of src #
# file and add those to *.d files. This is a #
# easy workaround for G12. #
# #
# G4. CXX: #
# Flag to mention the C++ compiler to used. #
# #
# G5. CXXFLAGS: #
# Flag to specify the option for C++ compiler. #
# #
# G6. EXE_NAME: #
# Name of the executable to be created. #
# #
# G7. SOURCE: #
# All the source to be used for compilation. #
# #
# G8. OBJS: #
# All the object file for linking. #
# #
# G9. DEPS: #
# All the dependencies information file. #
# #
# G10. -include #
# Tells GNU make to include all the file to #
# specify dependencies. Healthy replacment of #
# G12. #
# #
# G11. "Mentioned below" #
# #
# G12. "Mentioned below" #
# #
# G13. "Mentioned below" #
# #
# G14. "Mentioned below" #
#################################################################
#include Makefile.config
#Flags
# C program
CC = gcc
CFLAGS = -g
OUTPUT_OPTION = -MMD -MP -o $@
SHARED_LIBRARY_EXTENSION = so
SHARED_LIBRARY_FLAG = -shared
# C++ program
#CXX = g++
#CXXFLAGS = -g
#Variables
EXE_NAME = exe #Executable name.
SOURCE = $(wildcard *.c) #Source files.
OBJS = $(SOURCE:.c=.o) #Object files.
DEPS = $(SOURCE:.c:.d) #dependencies (To know the include files used in src)
-include ${DEPS}
LIB = lib
# OR can provide name of the file individually.
# The above for files present in the same directory as this
# files is present.
#
# .d files look like a part of Makefile.
# and it IS the part of Makefile.
##G11.
#####RULES IN MAKEFILE###################################
# ruleName: "files that are dependencies" #
# "Specify the commands to be executed" #
# #
# These are the rules that Makefile uses #
# to do the operations, as a build tool. #
#########################################################
#Executables and library with dependencies
${EXE_NAME}: ${OBJS}
${CC} ${OJBS} -o ${EXE_NAME}
##G12.
#####SOURCE FILE DEPENDENT ON HEADER FILE################
# "src or obj file": "header file" #
# for exe -> src.o: header.h #
# #
# If the src file of the given header file is #
# modified then, this specification ensures #
# the compilation of that source file if any #
# change is done. #
#########################################################
#Friendly help rule.
help:
-@echo "Customise the help rule to print help log."
##G13.
#######HIDING AND SKIPPING COMMANDS##########################
# -@ Tells the GNU make to not print the command before #
# executing it and enable to skip the command if it #
# failed to compile, as make stop if any command fails. #
#############################################################
#Building the Static library.
${LIB}: ${OBJS}
ar cr ${LIB}.a ${OBJS}
#Shorthand of doing the above same thing
${LIB}: ${LIB}(${OBJS})
#This link is about creating and using shared library
#https://www.cprogramming.com/tutorial/shared-libraries-linux-gcc.html
#Bulding the dynamic library.
${LIB}.${SHARED_LIBRARY_EXTENSION}: ${OBJS}
${CC} ${SHARED_LIBRARY_FLAG} -o $@ $^
##G14.
###MEANING OF $@ AND $^ SYMBOLS ON ABOVE RULE####################
# $@ -> Replacing itself with rule under which #
# its written. #
# $^ -> Replacing itself with dependencies of rule. #
#################################################################
#Rules for cleaning.
clean:
-@rm -f ${OBJS}
realclean: clean
-@rm -f ${LIB}